9-1
Project Window
9
Project Window 1
The Project Window is used to analyze, elaborate, and simulate VHDL
or mixed VHDL and Verilog projects.
Introducing the Project Window
The Project Window has three panes as shown in Figure 9-1, Sample
Project Window.
• Workspace Pane - Displays the content of a Workspace.
• View Pane - Displays the contents of Folders and Libraries.
• Output Pane - Displays analyze and elaboration output including
error messages.
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