Encore SIM EDITOR SOFTWARE User's Guide download pdf (Page 333)

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12-7

Event Origin

Event Origin Classifications

The event origin depends on the type of signal, which can be

classified into one of three major categories:

1. Register (reg, integer, time and real) variables, where the

values are assigned by procedural statements within initial blocks,

tasks, and functions. For these variables, the event origin is

defined as the procedural statement that last modified the variable

at the event time. These statements often exist in the same scope

as the variable declaration, but need not, as in the case of a

statement that assigns to a variable by hierarchical reference (For

example, top.cpu.PC = 32’h0000ff00).

2. Net (wire, tri, or, wor, and, wand, trireg, tri1, and tri0)

variables, which derive values from one or more continuous

assign statements, primitive terminal connections, or register

variables, drive values onto the net through port connections. The

drivers can exist in the same scope as the net, but can just as

easily exist in a different scope in the hierarchy, as is often the

case of a net connected to a module port instance.

3. Signals representing the output of a single primitive to a multi-

driver net. Such signals do not correspond to a variable in the HDL

source, but are produced by the VirSim VCD+ writer during

simulation to allow more accurate analysis of multi-driver nets.

The origin in this case is simply the primitive that produced the

contribution. These signals are only produced when the

+vpddrivers argument is given to the simulator.

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