17-29
VCD+ (vpd) File Generation
Figure 17-8 Example Definition of VCD+ Signal Capture (Recording)
Methods
You can implement signal data capture (recording) control in the
source code and at the shell command line, as shown in the following
Verilog examples.
fork
#0 $vcdplusglitchon;
#100 $vcdpluson (1,B);
#200 $vcdplusdeltacycleon;
#200 $vcdpluson (1,C);
#300 $vcdplusdeltacycleoff;
#300 $vcdplusoff (1,B);
#500 $vcdplusoff (1,C);
#600 $vcdpluson (D.clk);
#700 $vcdplusevent (D.clk, "UserEvent", "IS");
#900 $vcdplusoff (D.clk);
join
Module B
Module C Module D
Module A
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