Encore SIM EDITOR SOFTWARE User's Guide download pdf (Page 165)

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5-7

Source Window

Before Using the Source Window

Verilog

Verilog source information can come from either the Verilog source

or from the simulator PLI for certain simulators. The VCD+ file

produced by VCS or Scirocco when compiled with the -line option

contains information that allows the VirSim Source Window to work

without first compiling the source. When the VCD+ file is from other

simulators, the Verilog source must be compiled by VirSim. The Load

Sources dialog will automatically pop up if VirSim needs to compile

sources and source file information was not provided on the command

line. The source files do not necessarily need to reside in your local

directory; however, if they do not, you must provide the full path. You

may provide the source arguments on the VirSim command line, and

the compilation then will be performed when the information first is

required.

Line trace information can come from either a VCD+ file or via a PLI

from an interactive run. For line trace data to be stored in the VCD+

file, the simulator must have been explicitly instructed to store line

trace information in the Verilog code using $vcdplustraceon. When

the information is coming from a VCD+ file created with a simulator

other than VCS, the VCD+ file also must have been opened with the

Use Sources switch enabled (which is the default).

VHDL

You need to analyze the source code in debug mode before running

simulation.

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